Biography

I am a Ph.D. student in Electrical Engineering at the University of Pavia, Italy, specializing in power electronics. I worked as a Research Assistant in PELAB, the Power Electronics laboratory at the University of Pavia and in collaboration with NIDEC ASI S.p.A. during 2024-25 academic year. My research focuses on developing an Enhanced-STATCOM for active and reactive power compensation using supercapacitor-based energy storage, with implementation and validation through real-time simulation for hardware-in-the-loop (HIL) platform. I am proficient in industry-standard tools such as OPAL-RT, RT-LAB, MATLAB/Simulink, PLECS, LTspice, and Altium Designer.

CV

Projects

Enhanced STATCOM wiith Supercap: Design, Control and Real Time Simulator for Hardware In the Loop Test

Enhanced STATCOM wiith Supercap: Design, Control and Real Time Simulator for Hardware In the Loop Test

Contacts